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The Agilent J-BERT N4903A High-Performance Serial BERT provides the only complete jitter tolerance test solution for characterization of serial gigabit devices. The J-BERT offers complete, integrated and calibrated jitter composition for stressed eye testing of receivers. Automated and compliant jitter tolerance testing allows quick and accurate characterization for all popular serial bus standards, such as PCI Express, SATA, FB-DIMM, Fibre Channel, CEI, Gigabit Ethernet and XFP/XFI.
The J-BERT matches to latest serial bus interfaces perfectly with its ability to analyze undeterministic traffic, generate complex pattern sequences, subrate clock outputs. Clockless and differential interfaces can be tested. The J-BERT is an expandable, future-proof BERT platform where all options can be configured to the current test needs and upgraded later when those needs change.
It is the ideal choice for R&D and validation teams who characterize and stress chips and transceiver modules with serial I/O ports. - 150 Mb/s to 7 Gb/s or to 12.5 Gb/s pattern generator and error detector
- >0.5 UI calibrated and integrated jitter injection.
- Excellent signal performance and sensitivity
- Built-in clock data recovery with tunable and compliant loop bandwidth
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