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Tektronix P6982 Logic Analyzer Probe, 17-CH (Half-channel Mode Optimized) Differential High Density Compression with D-Max Probing Technology, Differential Clock and Single-ended Data

Logic Analyzer Probe, 17-CH (Half-channel Mode Optimized) Differential High Density Compression with D-Max Probing Technology, Differential Clock and Single-ended Data

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SPECIFICATIONS

With the industry’s lowest capacitance, the P6800 and P6900 Series logic analyzer probes for the TLA7000 protect the integrity of your signal – critical for connecting to fast buses like DDR2 and DDR3 where low intrusion is key to the proper operation of your design. Select from single-ended and differential probes and a variety of attachment mechanisms, including the “connectorless” compression connection that eliminates the need for onboard connectors.

For applications where circuit board space is at a premium, the high-density P6900 Series with D-Max® Probing Technology offers the industry’s smallest available footprint. For debugging the signal integrity glitches common on fast buses, the P6900 Series works with the TLA7Bxx and TLA7ACx modules and their iLink™ Tool Set capability to provide iCapture™ simultaneous digital-analog acquisition. This allows you to clearly see the time-correlated digital and analog behavior of your design, without the extra capacitance and setup time of double probing.

For differential signaling applications where signal integrity is critical, the high-fidelity P6980 and P6982 are perfect for those applications where noise performance is critical. In addition, the P6980 and P6982 can support the small voltage swings that differential signaling often requires. The P6962DBL, when used with a TLA7000 logic analyzer with the TLA7Bxx module, supports digital validation and debug of DDR3 memory with data rates up to 1600 mega-transfers per second. For board designs that do not include high-density probe footprints, the P6960 with its companion flying leadset or the P6810 provide the flexibility required to meet many different debug needs.

  • <0.7 pF Total Capacitive Loading Minimizes Intrusion on Circuits
  • 20 kΩ Input Resistance
  • 6.5 Vp-p Dynamic Range Supports a Broad Range of Logic Families
  • General-purpose Probing Allows Flexible Attachment to Industry-standard Connections
  • Connectorless Probing System Eliminates Need for Onboard Connectors
  • Hardware Debug and Verification
  • Processor/Bus Debug and Verification
  • Embedded Software Integration, Debug, and Verification
AVAILABLE EQUIPMENT OPTIONS
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